Qualitative Abstraction based Verification for Analog Circuits

The verification of analog designs is a challenging and exhaustive task that requires deep understanding of the physical behaviors. In this paper, we propose a qualitative based predicate abstraction method for the verification of a class of non-linear analog circuits. The method is based on combining techniques from constraint solving and computer algebra along with symbolic model checking. We have implemented the proposed verification algorithms using the computer algebra system Mathematica and the SMV model checker.